t4 - lds - 0249 , rev . 2 (4 /25/13 ) ?20 13 microsemi corporation page 1 of 6 2n682, 2n683, and 2n685 C 2n692 available on commercial versions pnpn silicon, reverse-b locking , p ower t riode thyristors qualified per mil - prf - 19500/108 qualified levels : jan and jantx description this sil icon controlled rectifier device is military qualified up to a jan tx level for high - reliability applications. to - 208 / to - 48 package impor tant: for the latest information, visit our website http://www.microsemi.com . features ? jedec registered 2n682, 2n683, 2n685 , and 2n687 C 2n692 . ? jan and jantx qualification s are available per mil - prf - 19500/ 108 . ? rohs compliant versions available (commercial grade only) . applications / benefits ? a general purpose, reverse - blocking thyristor . maximum ratings msc C law rence 6 lake street, lawrence, ma 01841 tel: 1- 800 - 446 - 1158 or ( 978) 620 - 2600 fax: (978) 689 - 0803 msc C ireland gort road business park, ennis, co. clare, ireland tel: +353 (0) 65 6840044 fax: +353 (0) 65 6822298 website: www.microsemi.com parameters/test conditions symbol value unit junction temperature t j - 65 to +125 o c storage temp erature t stg - 65 to +1 50 o c gate v oltage (peak total value) v gm 5 v(pk) maximum average dc output current (1) i o 16 a non - repetitive p eak on-s tate c urrent (2) @ t = 7 ms i tsm 150 a notes : 1. this average forward current is for a maximum case temperature of +65 c, and 180 electrical degrees of conduction. 2. surge rating is non - recurrent and applies only with device in the conducting state. the peak rate of surge current must not exceed 100 amperes during the first 10 s after switching from the off (blocking) state to the on (conducting) state. this time is measured from the point where the thyristor vol tage has decayed to 90 percent of its initial blocking value . downloaded from: http:///
t4 - lds - 0249 , rev . 2 (4 /25/13 ) ?20 13 microsemi corporation page 2 of 6 2n682, 2n683, and 2n685 C 2n692 mechanical and packaging ? case: nicke l plated copper . ? terminals: nickel plated steel, solder dipped or r ohs compliant matte - tin plating (on commercial and cds grade only) . ? marking: manufacturers id, part n umber, d ate c ode, p olarity . ? polarity: terminal 1: g ate, t erminal 2: c athode, t erminal 3 (stud): a node . ? weight: approximately 12.36 grams . ? see package dimensions on last page. part nomenclature jan 2n682 (e3) reliability level jan = jan level jantx = jantx level cds (reference jans) blank = commercial jedec type number ( see electric al characteristic s t able ) rohs compliance e3 = rohs c ompliant ( available on commercial grade only ) blank = non - rohs c ompliant symbols & definitions symbol definition c capacitance di/dt critical rate of rise of on - state current dv/dt critic al rate of rise of off - state voltage f frequency i f forward current i t on - state current i tm on - state current (peak total value) r resistance r e responsivity, radiant r l resistor load t time tp pulse variation v aa anode power supply voltage (dc) downloaded from: http:///
t4 - lds - 0249 , rev . 2 (4 /25/13 ) ?20 13 microsemi corporation page 3 of 6 2n682, 2n683, and 2n685 C 2n692 electrical characteristics parame t ers / te st co nditio ns symb ol mi n. max. un it repetitive peak reverse voltage a nd repetitive p eak o ff - state v oltage 2n682 2n683 2n685 2n686 2n687 2n688 2n689 2n690 2n691 2n692 v rrm (1) and v drm 50 100 200 250 300 400 500 600 700 800 v (pk) (1) values applicable to zero or negative gate voltage (v gm ). parame t ers / te st co nditio ns symb ol mi n. max. un it holding current: bias condition d; v aa = 24 v maximum; i tm = i f1 = 1 a i t = i f2 = 100 ma trigger voltage source = 10 v trigger pw = 100 s (minimum) r 2 = 20 i h 50 ma reverse blocking current ac method, bias condition d; f = 60 hz, v rrm = rated i rrm1 2 ma (pk) forward blocking current ac method, bias condition d; f = 60 hz; v drm = rated i drm1 2 ma (pk) gate trigger voltage and current v 2 = v d = 6 v; r l = 50 ; r e = 20 maximum v gt1 i gt1 3 35 v ma forward on voltage i tm = 50 a(pk) (pulse); pulse width = 8.5 ms; maximum; duty cycle = 2 percent maximum v tm 2 v (pk) reverse gate current v g = 5 v i g 250 ma downloaded from: http:///
t4 - lds - 0249 , rev . 2 (4 /25/13 ) ?20 13 microsemi corporation page 4 of 6 2n682, 2n683, and 2n685 C 2n692 electrical characteristics (continued) parame t ers / te st co nditio ns symb ol mi n. max. un it reverse blocking current ( t c = +120 oc ) ac method, bias condition d; f = 60 hz; v rrm = rated i rrm2 5 ma (pk) forward blocking current ( t c = +120 oc ) ac method, bias condition d; f = 60 hz; v drm = rated i drm2 5 ma (pk) gate trigger voltage ( t c = +120 oc ; r e = 20 max ) v 2 = v dm = 50 v ; r l = 140 v 2 = v dm = 100 v ; r l = 140 v 2 = v dm = 200 v ; r l = 140 v 2 = v dm = 250 v; r l = 650 v 2 = v dm = 300 v; r l = 650 v 2 = v dm = 400 v; r l = 3 k v 2 = v dm = 500 v; r l = 3 k v 2 = v dm = 600 v; r l = 3 k v 2 = v dm = 700 v; r l = 3 k v 2 = v dm = 800 v; r l = 3 k 2n682 2n683 2n685 2n686 2n687 2n688 2n689 2n690 2n691 2n692 v gt2 .25 v reverse blocking current ( t c = - 65 oc ) ac method, bias condition d; f = 60 hz; v rrm = ra ted i rrm3 2 ma (pk) forward blocking current ( t c = - 65 oc ) ac method, bias condition d; f = 60 hz; v drm = rated i drm3 2 ma (pk) gate trigger voltage and current ( t c = - 65 oc ) v 2 = v d = 6 v; r l = 50 ; r e = 20 maximum v gt3 i gt2 3 80 v ma expone ntial rate of voltage rise bias condition d; t c = +120c minimum, dv/dt = 25 v/s; repetition rate = 60 pps; test duration = 15 s; c = 1.0 f; r l = 50 v aa = 50 v v aa = 100 v v aa = 200 v v aa = 250 v v aa = 300 v v aa = 400 v v aa = 500 v v aa = 600 v v aa = 700 v v aa = 800 v 2n682 2n683 2n685 2n686 2n687 2n688 2n689 2n690 2n691 2n692 v d 47 95 190 240 285 380 475 570 665 760 v downloaded from: http:///
t4 - lds - 0249 , rev . 2 (4 /25/13 ) ?20 13 microsemi corporation page 5 of 6 2n682, 2n683, and 2n685 C 2n692 electrical characteristics (continue d) parame t ers / te st co nd itio ns symb ol mi n. max. un it circuit - commutated turn - off time t c = +120c minimum; i tm = 10 a; t on = 100 50 s; di/dt = 5 a/s minimum; di/dt = 8 a/s maximum; reverse voltage at t 1 = 15 v minimum; repetition rate = 60 pps maximum; di/dt = 20 v/s; gate bias conditions; gate source voltage = 0 v; gate source resistance = 100 v dm = v drm = 50 v (pk); v rrm = 50 v maximum v dm = v drm = 100 v (pk); v rrm = 100 v maximum v dm = v drm = 200 v (pk); v rrm = 200 v maximum v dm = v drm = 250 v (pk); v rrm = 250 v maximum v dm = v drm = 300 v (pk); v rrm = 300 v maximum v dm = v drm = 400 v (pk); v rrm = 400 v maximum v dm = v drm = 500 v (pk); v rrm = 500 v maximum v dm = v drm = 600 v (pk); v rrm = 600 v maximum v dm = v drm = 700 v (pk); v rrm = 700 v maximum v dm = v drm = 800 v (pk); v rrm = 800 v maximum 2 n682 2n683 2n685 2n686 2n687 2n688 2n689 2n690 2n691 2n692 t off 30 30 30 30 30 30 40 40 60 60 s gate controlled turn - on time v aa = 50 v for 2n682 v aa = 100 v for 2n683 , 2n685 through 2n692 i tm = 10 a; v gg = 10 v; r e = 25 t p1 = 15 5 s; 4 a/s di/dt 200 a/s. 2n682 , 2n683, 2n685 through 2n692 t on 5 s downloaded from: http:///
t4 - lds - 0249 , rev . 2 (4 /25/13 ) ?20 13 microsemi corporation page 6 of 6 2n682, 2n683, and 2n685 C 2n692 package dimensions notes: 1. dimensions are in inches. millimeters are given for information only. 2. device contour, except on hex head and noted terminal dimensions, is optional within zone defined by cd and oah, cd not to exceed actual hf. 3. contour and angular orientation of terminals 1 and 2 with respect to hex portion and to each other are optional. 4. chamf er or undercut on one or both ends of the hexagonal portion are optional. 5. square or radius on end of terminal is optional. 6. minimum difference in terminal lengths to establish datum line for numbering terminals. 7. dimension sd is pitch diameter of coated threads. 8. in accordance with asme y14.5m, diameters are equivalent to x symbology. dimensions ltr inches millimeters notes min max min max b 0 .115 0 .139 2.92 3.53 3 b1 0 .210 0 .300 5.33 7.62 3 cd - 0 .543 - 13.8 2 ch - 0 .550 - 14.00 e2 0 .125 - 3.17 - 6 hf 0 .544 0 .563 13.8 14.3 ht 0 .075 0 .200 1.9 5.08 4 oah - 1.193 - 30.3 2 s 0 .120 - 3.05 - 3 sd ? - 28 unf 2a sl 0 .422 0 .453 10.7 11.5 su - 0 .090 - 2.29 t 0 .125 0 .165 3.17 4.19 t1 0 .060 0 .075 1.52 1.9 ud 0 .220 0 .249 5.59 6.32 terminal 1 gate terminal 2 cathode 5 terminal 3 anode (stud) 7 downloaded from: http:///
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